1. Field
The present disclosure herein relates to semiconductor devices and methods of fabricating the same. More specifically, the present disclosure relates to semiconductor devices employing high-k dielectric layers as a gate insulating layer and methods of fabricating the same.
2. Description of Related Art
Semiconductor devices may include complementary metal-oxide-semiconductor (CMOS) integrated circuits composed of N-channel MOS transistors and P-channel MOS transistors for low power consumption. High-k dielectric layers and metal layers may be used as gate insulating layers and gate electrodes, respectively to improve the integration density and the performance of the semiconductor devices. Further, the metal gate electrodes of the N-channel MOS transistors may be formed of a different material from the metal gate electrodes of the P-channel MOS transistors to optimize threshold voltage characteristics of the N-channel MOS transistors and the P-channel MOS transistors. The metal gate electrodes of the N-channel MOS transistors may be formed of a material having different work function from the metal gate electrodes of the P-channel MOS transistors.